Design of Low-Phase-Noise CMOS Ring Oscillators
نویسندگان
چکیده
This paper presents a framework for modeling the phase noise in complementary metal–oxide–semiconductor (CMOS) ring oscillators. The analysis considers both linear and nonlinear operations, and it includes both device noise and digital switching noise coupled through the power supply and substrate. In this paper, we show that fast rail-to-rail switching is required in order to achieve low phase noise. Further, flicker noise from the bias circuit can potentially dominate the phase noise at low offset frequencies. We define the effective factor for ring oscillators with large and nonlinear voltage swings and predict its increase for CMOS processes with smaller feature sizes. Our phase-noise analysis is validated via simulation and measurement results for ring oscillators fabricated in a number of CMOS processes.
منابع مشابه
Design and Performance Analysis of Nine Stages Cmos Based Ring Oscillator
This paper deals with the design and performance analysis of a ring oscillator using CMOS 45nm technology process in Cadence virtuoso environment. The design of optimal Analog and Mixed Signal (AMS) very large scale integrated circuits (VLSI) is a challenging task for the integrated circuit(IC) designer. A Ring Oscillator is an active device which is made up of odd number of NOT gates and whose...
متن کاملThe Transient Behavior of LC and Ring Oscillators under External Frequency Injection
In this work, time domain analysis is used to solve Adler’s equation in order to obtain the required time, for an oscillator under external injection, reaching the steady-state condition. Mathematical approach has been applied to fully describe the transient of frequency acquisition in injection-locked LC and Ring oscillators considering their time-varying nature. Then, the analysis is verifie...
متن کاملComparison and analysis of phase noise in ring oscillators
Voltage-controlled oscillators are widely used circuit blocks, particularly in phase-locked loops. As CMOS is the technology of choice for many applications, CMOS oscillators with low phase noise and timing jitter are highly desired. CMOS ring oscillators with five different delay cell topologies have been designed, fabricated and evaluated for phase noise performance. Our results show that rin...
متن کاملJitter Optimization Using the Body Bias in Digital CMOS Ring Oscillators ( EE 241 Project , May 5 , 2003 )
— This paper investigates the concept of using body bias as a design tool to optimize the timing jitter and power dissipation in single ended CMOS ring oscillators. A theoretical model for phase noise and timing jitter in ring oscillators is summarized and used as a basis for simulation of the impulse sensitivity function. Simulation results are then used to estimate timing jitter and phase noi...
متن کاملLow power consumption, low phase noise ring oscillator in 0.18 μm CMOS process
In this work, a new ring voltage controlled oscillator with a two cross coupled load PMOS transistors is proposed. The proposed method preserves the maximum frequency of the VCO unaffected which leads to improvement in phase noise and the power consumption of VCO oscillators. The proposed ring oscillator implemented in 0.18μm CMOS shows the worse phase noise of -108 dBc/Hz at 10MHz offset, tuni...
متن کامل